a wafer metrology consortium under MAGNET

<span>THE</span> 450mm

THE 450mm

REVOLUTION

Advancing 450mm metrology 

What?

According to ITRS, the expectation is that in 2018, chip manufacturers will start moving toward high-volume manufacturing (HVM) with 450mm wafers. Already today, these manufacturers are building pilot lines and readying facilities for this purpose. Israeli metrology companies plan on being at the forefront of this revolution.

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Why?

The primary reason of moving to 450mm is cost; the 450mm manufacturing tools must be faster to enable more dies out, Such a change lead to a concomitant requirements in significantly updated metrology tools. It is this major step in chip manufacturing which the Metro450 consortium wants to utilize as a slingshot far advancing Israeli-based metrology companies.

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When?

Already today (in 2013), the large computer chip manufacturers are working on pilot lines for the 450mm wafer production. Based upon published reports, by 2018, at least some of these manufacturers will move toward high-volume manufacturing of chips on this wafer size.

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How?

Israeli metrology companies are fierce competitors. How are they able to get together in such a consortium? The answer lies in the type of knowledge they share. No information is shared that is machine-specific. Details about how the measurements are done are not shared. Instead, non-core-IP is revealed. The cooperation lies in cooperation in pre-competitive issues, such as those described in the work packages.

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Around the world

Metro450 is an Israeli consortium which is cooperating with international consortia, including G450C, based in Albany, NY, and with several European projects, such as 450EDL and 450PR under the aegis of ENIAC. Metro450 Israel welcomes additional cooperation with similar bodies around the world.

News and Events

8.7.2014
Officials at the SUNY College of Nanoscale Science and Engineering in Albany unveiled its first fully-patterned 450mm wafers at a major computer chip industry conference in San Francisco
18.6.2014
Researchers at the SUNY College of Nanoscale Science and Engineering are taking the “notch” out of the silicon wafers used to make microchips.
22.5.2014
The seventh newsletter for the Enable450 project

Work Packages

1

WP 1: Wafer Handling / Chucking / Stepping

Work package 1 addresses the challenges for moving the wafer quickly and efficiently. The overall speed of movement is dependent upon both the physical movement and the settling time.

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2

WP 2: Sampling Optimization

In order to determine if there are defects in the production of the dies, many points on the wafer are examined. Perhaps there is a better, more efficient method for determining just how many points really need to be checked. The goal of WP2 is to find more efficient sampling strategies than exist today.

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3

WP 3: Wafer Damage and Contamination

With the larger wafer size and smaller critical dimensions of the 450 wafers, damage and contamination control become serious challenges. WP 3 attempts to determine the cause of some of the damage, and researches methods to reduce contamination in order to meet stringent specifications for the 450mm wafer era.

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4

WP 4: 450mm Standard Calibration Wafer

It is the goal of WP4 to bring forth an industry-wide standard metrology calibration wafer. Such a wafer would help in monitoring the stability of the tool. It would also help in tool-to-tool matching.

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5

WP 5: Fast Data Collection and Processing

With the move toward 450mm wafers, and the concomitant reduction in critical dimensions, the overall data and number of calculations increases dramatically. The goal of WP5 is to utilize off-the-shelf components in order to help in the configuration of a metrology-specific computer design.

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