a wafer metrology consortium under MAGNET

450 Metro background

450 Metro background

The driving force for 450mm wafers

The Metro450 consortium is sponsored by the MAGNET program, part of the Office of the Chief Scientist  of the Ministry of the Economy

Semiconductor devices are made on round, flat silicon wafers. Such a configuration has proven to be the most cost effective for the multiple processes in chip making (dies). The principal process of semiconductor devices fabrication is the creation of a pattern by a series of repetitive steps of layer deposition, lithography, and etching. The silicon wafer will have more than 80 layers, some of them at an atomic scale thickness, and a geometrical feature of about 20 nanometers in width. The wafer layout contains many chips or dies (a die is defined by the lithography image and may contain one or more chips). Wafer fabrication is performed in wafer fabs. When the wafer manufacturing process is completed, the wafer is sliced into individual chips. Each chip will be tested and packed. Generally the wafer testing, dicing and packaging is done in different manufacturing places, called assembly houses.
Currently, advanced wafer fabs process 300mm diameter wafers. The industry is determined to follow Moore’s Law in order to respond the need for better performance and lower transistor cost. Moore’s Law demands a miniaturization of the device geometries. During the late 1980’s the device’s smallest features were at a scale of one micron. Now we have reached the 20 nanometer scale. This progress demands an adoption of new technologies in all steps of manufacturing. The implementation of new solutions has increased the tool’s complexity and cost dramatically.

The remedy for the inevitable cost ramp was to increase wafer size from time to time in order to generate more devices on each wafer. At each wafer diameter change the manufacturing and metrology tool was modified for a larger wafer size. The cost increase was roughly linear to the wafer diameter, whereas the increase in productivity (more chips per wafers) was a function of the wafer area. Hence the economic advantage was huge and enabled the industry to respond to the increasing demand of semiconductor chips with better performance, but without an associated increase in cost.

The creation of the very complex semiconductor devices requires constant supervision to ensure that the process runs correctly, with tiny adjustments required periodically to ensure that each successive die performs as the previous one.

Metrology

Metrology is the science of measurement. In the semiconductor field, metrology usually refers to the measurement of various features (Critical dimensions). Such measurement determines if the semiconductor device was built properly.

Various other metrology demands exist in the manufacture of semiconductors, including Wafer Inspection (WI), where the wafer is scanned and defects are detected; Defect Review (DR), where those defects that are detected in the WI stage are then inspected more closely; Thin Film Measurement, where the thickness of a layer is measured, and so on.

Goal

The primary goal of Metro450 is the advancement of 450mm-capable metrology by concentration on throughput, cleanliness and computing capability as well as by developing a standard calibration wafer.